1. Field of the Invention
This invention relates to electronic circuits, and more particularly, to packaging of integrated circuits.
2. Description of the Related Art
Semiconductor chips that consume a large amount of power and/or operate at high frequencies require a power connection which has low impedance over a wide frequency band. One method of achieving a low impedance power connection is to use a large number of conductors from the semiconductor chip (typically contained within a package) to the printed circuit board to which it is connected.
Switching circuitry on a semiconductor chip may generate a significant amount of electrical noise. This noise may escape the packaging in which the semiconductor chip is contained in various ways, such as through the radiation of current loops on the chip and within the package and common-mode radiation created by electrical noise radiating out through the low impedance connection. The escaping electrical noise may lead to electromagnetic interference (EMI) with other components, which may adversely affect their operation. Thus, it is desirable to prevent or minimize the escaping of electrical noise from the package of a semiconductor chip.
One circuit configuration for minimizing the amount of noise that may escape is shown in FIG. 1. In the embodiment shown, the core power is provided to a silicon chip in a package through pins that are placed near the horizontal center of the package. Such a configuration may block core transient current from getting outside the package, but may do little to stop noise leakage through the direct vertical connections from the silicon core to a printed circuit board (PCB) via the pins.